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Quick Facts

Total Fees
1.43 L
Exam
GATE
Seats
18

Fees Details

General

1.43 L

Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

Course Details

MODE

Full time

DURATION

24 Months

Master of Technology (M.Tech) in Electronics Design and Technology is a two-year full-time postgraduate program offered by National Institute of Electronics and Information Technology, Ropar


Important dates

Exams and EventsDates
GATE
Admit Card Date (Mode - Online)
6 Jan'25 - 17 Dec'25
GATE
Application Date - without late fee (Mode - Online)
27 Aug'24 - 24 Dec'25
GATE
Answer Key Date - Provisional answer key (Mode - Online)
26 Feb'25 - 24 Dec'25
GATE
Answer Key Date - Objection to provisional answer key (Mode - Online)
26 Feb'25 - 25 Dec'25
GATE
Answer Key Date - Final answer key (Mode - Online)
1 Apr'25 - 25 Dec'25
GATE
Interview Date - exam date is upcoming (Mode - Offline)
25 Dec'25 - 30 Dec'25
GATE
Application Correction Date (Mode - Online)
30 Oct'24 - 28 Dec'25
GATE
Score Card Date (Mode - Online)
27 Mar'25 - 30 Dec'25
GATE
Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online)
31 May'25 - 30 Dec'25
GATE
Result Date (Mode - Online)
18 Mar'25 - 2 Jan'26
GATE
Exam Date (Mode - Online)
6 Feb'26 - 7 Feb'26
GATE
Exam Date (Mode - Online)
13 Feb'26 - 14 Feb'26
GATE
Result Date (Mode - Online)
18 Mar'26 - 18 Mar'26

Eligibility Criteria

Passed any graduation degree (e.g.: B.E. / B.Tech./ B.Sc / B.Com. / B.A./ B. Voc./ BCA etc. in commerce & management/ sciences/ mathematics/  statistics/ engineering) having obtained at least 50% marks (45% for SC/ST & PWD) in graduation).

or

NIELIT ‘A’ Level with graduation. The students should have a minimum of 50% marks (45% for SC/ST & PWD) in graduation).

Admission Details

  1. Only the Candidates meeting the minimum eligibility criteria will be eligible for admission.

  2. The eligible candidates have to register online.

  3. The application fees will be as applicable from time to time.

  4. For engineering programmes, the seats will be filled through CCMT, wherever applicable, and / or on the basis of valid GATE score in any one out of  IT, EC, EE, IN, CSE, CS disciplines and / or on the basis of merit of entrance test in relevant disciplines conducted by NIELIT Deemed to be University.

  5. Admission of the Selected Candidates will be subject to their verification of Documents and payment of applicable fees.

  6. The category-wise Main List (selected) and Waiting List of the candidates on the basis of entrance exam for admission to various programmes will be displayed on the website and Notice Board of the University only.

  7. The waitlisted candidates, available at the time of counselling of the waiting list, shall be provisionally admitted as per the merit of the category-wise waiting list.

  8. The candidates are required to produce all the originals certificates and fee at the time of counselling. No relaxation in time will be given for arranging the money or for bringing the original certificates from another place.

  9. Admission process of the various Course is completed when the approved intake of candidates as per Seat Matrix are provisionally admitted and registered or a time limit decided by the University is over, which- ever is earlier.

Top Exams Accepted by National Institute of Electronics and Information Technology (NIELIT), Calicut

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